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main features ? high sensitivity and high snr performance 2/3" cmos sensor total resolution of 2.5m (with 5 m square pixels) high data rate: 150 mpixels/s provides 60 frame/s at 2m resolution (for 2m60) camera link ? data format (base conf iguration - 2 channels) flexible and easy to operate vi a serial communication control ? gain: 0 db to 18 db in 3 db steps ? bit depth: 8, 10 or 12-bit data ? contrast expansion ? shutter time pogrammable ? trigger mode: free-run or external trigger mode ? programmable roi ? test pattern column fpn correction programmable look-up table single power supply: dc 12v to 24v provided on hirose-6 connector input ttl trigger signal and output ttl shutter signal on hirose-5 connector compact design: 44 44 45 mm (w, h, l) c-mount adapter high reliability - ce and fcc compliant product description this camera features an outstanding sensitivity and dynamic range even at maximal speeds. the roi allows to increase the frame rate (for instance, 157 fps in vga format 2m60). atmos? cameras are bas ed on a rolling shutter cmos sensor. the configuration interface provides access to advanced functions (contrast expan- sion, image calibration, lut). the versatile and compact mechanical housing enables you to implement various configurations. these features combin ed with a compelling price, make atmos an attractive alterna- tive for demanding users of megapixel cameras. applications high-speed, dynamic range performance and reliabilit y of this camera make it suitable for machine vision, especially: material inspection (e.g. glass, ic, pcb) robot guidance metrology and various applications like: microscopy surveillance demanding tasks camera link ? areascan cameras atmos ? 2m60 atmos ? 2m30 preliminary 5440a?image?10/05
2 5440a?image?10/05 atmos -2m60/2m30 [preliminary] 1. typical performances note: 1. measured with light source 3200 k and bg38 ir cut-off f ilter 2 mm thickness. table 1-1. camera typical performances sensor characteristics at maximum pixel rate 2m60 2m30 unit resolution h v 2096 1184 2096 1184 pixels pixel size (square) 5 5 5 5 m maximum frame rate 48 24 hz pixel rate 150 75 mhz camera performances bit depth 8, 10 or 12 bits spectral range 350?1000 nm linearity 2% in 5% and 95% of fsr prnu 1.5% rms fpn 0.1% rms peak response @ g = 0 33 (1) lsb/nj/cm 2 output rms noise dynamic range < 3 lsb rms > 62.5 db conversion factor 11 e - / lsb dark current 1500 e - /s over illumination behavior 75 esat mechanical and electrical interface size (w h l) 44 44 45 mm weight 115 g lens mount c-mount sensor alignment ? x, y = 250 ? z = 150 ?0 xy = 0.7 ? tilt z = 0-200 m m degree m power supply single 12 to 24 vdc power consumption < 3 w operating temperature 0 to 55 (non-condensing) c storage temperature -40 to 70 c
3 5440a?image?10/05 [preliminary] atmos -2m60/2m30 figure 1-1. responsivity diagram figure 1-2. quantum efficiency responsivity at 0 db gain 0% 20% 40% 60% 80% 100% 300 400 500 600 700 800 900 1000 wavelength (nm) response (%) = 70% = 60% = 50% quantum efficiency 0 0,1 0,2 0,3 0,4 0,5 0,6 0,7 0,8 500 800 wavelength (nm)
4 5440a?image?10/05 atmos -2m60/2m30 [preliminary] 2. standard conformity the cameras have been tested in the following conditions: camera with comple te atmel housing shielded power supply cable camera link data transfer cable ref. 14b26-szlb-500-olc (3m?) linear ac-dc power supply atmel recommends using the same configurati on to ensure compliance with the following standards. 2.1 ce conformity the atmos cameras comply with the european directive 89/336/cee (en55022 a/cispr22 a, en55024, en61000-6-2). 2.2 fcc conformity atmos cameras comply with part 15 of fcc rules. operation is subject to the following two conditions: 1. this device may not cause harmful interference, and 2. this device must accept any interference received, including interference that may cause undesired operation. this equipment has been tested and found to comply with the limits for a class a digital device, pursuant to part 15 of the fcc rules. these limits are designed to provide reasonable protec- tion against harmful interference when the equipment is operated in a commercial environment. this equipment generates, uses, and can radiate radio frequency energy and, if not installed and used in accordance with the instruction manual, may cause harmful interference to radio communications. operation of this equipment in a residential area is likely to cause harmful interference in which case the user will be required to correct the interference at his own expense. warning : changes or modifications to this unit not expressly approved by the party responsible for compliance could void the user's authority to operate this equipment.
5 5440a?image?10/05 [preliminary] atmos -2m60/2m30 3. camera description figure 3-1. camera synoptic the camera is based on a single tap cmos sensor which delivers a 12-bit digital video signal at its output. an fpga has been implemented for image processing (fpn column correction, con- version lut, contrast expansion). the camera is powered by a single dc power supply from 12v to 24v. the functional interface (data and control) is provided with the camera link inter- face. the camera uses the base configuration of the camera link standard. note: dval permanently tied to 1 (high) level. data is delivered on two channels. the data format configuration might be in 12-bit, 10-bit, or 8- bit. it is possible to use external triggers with the camera (cc1 signal or ttl_io trigger input) in different trigger modes see ?synchronization modes? on page 6 the camera configuration and settings are done via the camera link serial communication. this interface is used for: gain and offset setting data output format synchronization modes: free-run or external trigger modes shutter time test pattern generation upload and download of correction data (fpn column correction, lut) cmos sensor microcontroller cameralink transceiver tx rx power supplies dc power camera link i/f sequencer controller data serial line trigger strobe, lval shutter fval trigger shutter
6 5440a?image?10/05 atmos -2m60/2m30 [preliminary] 4. timing 4.1 synchronization modes the camera operates in rolling shutter mode. 4.1.1 optimal use of the rolling shutter as shown in the following timing diagrams, figure 4-1 , exposure does not happen at the same time for all lines. when using the camera with a strobe light or a shutter element all the lines are exposed during the same time and no image distorti on is visible when capturing fast moving objects . the integration time for each line is: readout (+ programmable shutter time, when used). a shut- ter signal is provided to strobe a light source or to drive a shutter element. you can set the camera to operate in one of the following synchronization modes: periodic, triggered, triggered without full reset and itc. see register mode control @ 204h, internal register mapping on page 16 . 4.1.2 free-run mode (or periodic mode) principle : the camera operates in periodic mode. the period is defined by readout time (+ programmable shutter time, when used). valid data is forwarded to the camera link interface during the next frame readout starting with the first line. i f shutter time is set to 0: the frame n is readout while the first line integrates for frame n+1. as soon as the frame n readout has ended starts the readout of frame n +1. figure 4-1. free-run mode chronogram line 1 integration (frame n) frame n readout line 1 readout and reset line n integration (frame n) line n readout and reset frame n+1 readout
7 5440a?image?10/05 [preliminary] atmos -2m60/2m30 if shutter time is set to > 0: readout is suspended between two consecutive frame readout and shutter output signal is acti- vated (programmable polarity) for a time configurable within 0 to tsh range by step of t1. figure 4-2. free-run mode and shutter chronogram the maximum frame rate of 48 frame/s for the 2m60 camera (or 24 frame/s for the 2m30 cam- era) is given in this mode with a shutter time set to 0. see register aperture shutter time @ 246h, internal register mapping on page 16 . 4.1.3 triggered mode principle: an external trigger starts the reset of the sensor, then snap and readout of a frame, the integration time is defined by readout time (+ programmable shutter time, when used). the trigger event initiate s the following sequence: stop of readout frame in progress and reset of readout pointer to line 1 readout of previous dummy frame and integration start of the frame n. the readout data of previous frame is not forwarded on camera link interface (fval inactive) shutter output signal is activated during a time programmable within 0 to tsh range by step of t1 table 4-1. shutter time values at free-run mode label description 2m60 2m30 tsh maximum shutter time (ms) 655 1310 t1 step duration (s) 10 20 line 1 integration (frame n ) readout and rese t line n integration (frame n) frame n programmable shutter time shutter line n readout and reset readout time readout frame n - 1 time out line 1
8 5440a?image?10/05 atmos -2m60/2m30 [preliminary] readout of frame n. the readout data is forwarded to the camera link interface (fval active) starting with the first line readout of dummy frames (to prevent against large dark current integration) while the camera waits for the next trigger event the trigger delay is a few s. the minimum pulse duration is 1 s. the edge of trigger is pro- grammable. the source of trigger is selectable between camera link cc1 signal and ttl/io trigger input. the period is defined by readout time + programmable shutter time + readout time + wait. therefore the minimum period is 2 readout time. see register aperture shutter time @ 246h, internal register mapping on page 16 . figure 4-3. triggered mode chronogram 4.1.4 triggered mode without full reset principle : an external trigger starts the snap and readout of a frame, without resetting the sen- sor. the integration time is defined by readout time (+ programmable shutter time, when used). the trigger event initiate s the following sequence: stop of readout frame in progress and reset of readout pointer to line 1 shutter output signal is activated during a time programmable within 0 to tsh range by step of t1 table 4-2. shutter time values at triggered mode label description 2m60 2m30 tsh maximum shutter time (ms) 655 1310 t1 step duration (s) 10 20 line 1 reset line 1 integration (frame n) frame n readout line n integration (frame n) line n reset line 1 readout and reset trigger n event trigger in programmable shutter time shutter out trigger delay fval line n readout and reset
9 5440a?image?10/05 [preliminary] atmos -2m60/2m30 readout of frame n. the readout data is forwarded to the camera link interface (fval active) starting with the first line readout of dummy frames (to prevent against large dark current integration) while the camera waits for the next trigger event the trigger delay is a few s. the minimum pulse duration is 1 s. the edge of trigger is pro- grammable. the source of trigger is selectab le between camera link cc1 signal and ttl_io trigger input. the period is defined by the programmable shutter time + readout time + wait. therefore the minimum period is reduced to 1 readout time. as the integration time is not the same for all lines (in the following timing diagra m line n integration time is greater than line 1 integration time) this mode must be used with a pulsed light source or a shutter element. more- over any residual light when shutter output signal is inhibited must be avoided. the exposure time is defined by the shutter time and all the lines are exposed during the same time. see register aperture shutter time @ 246h internal register mapping on page 16 . figure 4-4. triggered mode withou t full reset chronogram table 4-3. shutter time values at triggered mode without full reset label description 2m60 2m30 tsh maximum shutter time (ms) 655 1310 t1 step duration (s) 10 20 line1 reset line 1 integration (frame n) frame n readout line n integration (frame n) line n reset line 1 readout and reset trigger n event trigger in programmable shutter time shutter out trigger delay fva l line n readout and reset
10 5440a?image?10/05 atmos -2m60/2m30 [preliminary] 4.1.5 itc mode principle : an external sync controls both the integration time and the frame rate. the trigger event initiate s the following sequence: stop of readout frame in progress and reset of readout pointer to line 1 shutter output signal is activated during a time defined by the high state of the itc signal readout of frame n. the readout data is forwarded to the camera link interface (fval active) starting with the first line readout of dummy frames (to prevent against large dark current integration) while the camera waits for the next trigger event the integration delay is a few s. the minimum pulse duration is 1 s. the source of itc signal is selectable between camera link cc1 signal and ttl_io trigger input. see register mode control @ 204h internal register mapping on page 16 . the period is defined by the itc signal period. as the integration time is not the same for all lines (in the following timing diagram line n integra- tion time is greater than line 1 integration time) this mode must be used with a pulsed light source or a shutter element. moreover any resi dual light when shutter output signal is inhibited must be avoided. the exposure time is defined by the itc signal high state time and all the lines are exposed during the same time. figure 4-5. itc mode chronogram line 1 reset line 1 integration (frame n) frame n readout line n integration (frame n) line n reset line 1 readout and reset trigger n event itc in shutter time shutter out trigger delay fval line n readout and reset
11 5440a?image?10/05 [preliminary] atmos -2m60/2m30 4.2 ouput data timing figure 4-6. output data chronogram 5. camera features 5.1 region of interest the full resolution of the camera is 2096 pixels by 1184 lines.you might program a smaller reso- lution in order to reduce the readout time. you must be careful that depending on the sequencing mode, the exposure time can be re duced too.the authorized values for horizontal size are 32 to 2096 pixels. this value is rounded to the lower multiple of 16 pixels. the autho- rized values for vertical size are 32 to 1184 lines. this value is rounded to the lower multiple of 9 lines. see registers roi area @ 280h, 282h, 284h and 286h internal register mapping on page 16 . examples of frame rate versus resolution: 5.2 analog gain the analog gain can be adjusted by setting the gain register via the serial communication. gain adjusted from 0 db to 18 db: code 0 to 6 step 3 db nominal gain (factory configuration): 0 db see register sensor analog gain @ 240h, internal register mapping on page 16 . table 4-4. timing values label description min typ max ts input setup to clock delay 1ns th output hold from clock delay 1ns lval strobe data first valid pixel last valid pixel ts th table 5-1. r.o.i performance roi size frame rate 2m60 (fps) frame rate 2m30 (fps) 2096 1184 48 24 1920 1080 60 30 1600 999 75.7 37 640 477 157 78
12 5440a?image?10/05 atmos -2m60/2m30 [preliminary] 5.3 output format the data format available on the camera link output interface is programmable via the serial interface. note: the pixel depth is set by default at 12-bit, it can be set to 10 or 8-bit. the assignment for each con- figuration comply with the specifications of the ca mera link interface stan dard. see register mode control bits [3:2] @ 204h, internal register mapping page 16 . 5.4 test pattern in normal mode, the digital video signal from the se nsor is available on the camera link output interface. for test purposes a digital pattern is generated and is available instead of the video signal in the camera link output interface. the pa ttern can be fixed or sliding. the fixed digital pattern is ramp-up from 960 lsb code to 2008 lsb code (line width). the same pattern is shown for each line: figure 5-1. test pattern view the sliding pattern starts with the fixed pattern, the first code of each line is then incremented by two on each frame. it is useful to validate the connection to the acquisition system before the adjustment settings of the image capture. the output format is the only processing which applies to the test pattern. see ?digital processing synoptic? on page 14 . see register mode control bits [1:0] @ 204h, internal register mapping on page 16 . 5.5 contrast expansion this processing does not apply to the test pattern. the digital gain and offset can be adjusted via the serial communication in order to focus on a particular part of the dynamic range. gain adjusted from x1 to x32.875: code 0 to 255 step 0.125 nominal gain (factory configuration): 1 see register digital gain @ 242h, internal register mapping on page 16 . offset adjusted from -4096 to +4095: code 0 to 8191 in 2's complement step 1 nominal offset (factory configuration): 0 see register digital offset @ 244h, internal register mapping on page 16 . see register processing control bits [1:0] @ 202h, internal register mapping on page 16 .
13 5440a?image?10/05 [preliminary] atmos -2m60/2m30 5.6 look- up table (lut) the look-up table is a conversion table which applies to the sensor data. at each input pixel value corresponds a single output value. this allows you to apply a correction table like a gamma correction for example. the look-up table do es not apply to the test pattern. the look- up table might be generated by the camera by programming the gamma setting: gamma 0.125 to 7.875: code 1 to 63 (0 not admitted) you might also write your own correction table via the serial communication channel. four banks are available to store four distinct correction tables. see register lut coefficient save in dataflash @ 10dh, internal register mapping on page 16 . see register lut coefficient restore in data flash @ 10eh, internal register mapping on page 16 . see register processing control bit 2 @ 202h, internal register mapping on page 16 . 5.7 fixed pattern noise (fpn) correction the fixed pattern noise (fpn) is a spatial fluctuat ion of the sensor data particularly between suc- cessive columns. the purpose is to calculate an offset for each column of the frame in the darkness. the table of column offsets is stored in the internal memory. if the fpn correction is then enabled the offset values are subtracted to the value of the input pixel. two methods are available to realize this processing: the off-line calibration and the online correction. 5.8 off-line calibration a calibration step is required while the camera is in darkness condition. offset coefficients for each column are calculated on an average value measured on the 1024 first lines. offset coeffi- cients are 8-bit data. therefore to be efficient the pixel value should be always within the values 1lsb to 255 lsb. if not, the overflow/underflow flags are set in the status register. the calibra- tion step must be done in full resolution. calibration data can be saved in nonvolatile memory and four distinct banks are reserved for this use. you might access to these banks in read or write mode. see register processing control bits [4:3] @ 202h, internal register mapping on page 16 . see register calibration control @ 200h, internal register mapping on page 16 . see register fpn coefficient save in dataflash @ 10bh, internal register mapping on page 16 . see register fpn coefficient restore in dataflash @ 10ch, internal register mapping on page 16 . 5.9 online correction no calibration step is required. when online corr ection is enabled the camera calculates the off- set coefficients for each colu mn on masked lines and then processes the input sensor data. these coefficients are updated at each frame. th e calculated values are less accurate with these methods but unlike the off-line calibration do not depend on the settings like the analog gain. see register processing control bits [4:3] @ 202h, internal register mapping on page 16 . see register fpn coefficient save in dataflash @ 10bh,internal register mapping on page 16 . see register fpn coefficient restore in dataflash @ 10ch, internal register mapping on page 16 .
14 5440a?image?10/05 atmos -2m60/2m30 [preliminary] 5.10 digital processing synoptic figure 5-2. synoptic 5.11 defective pixels correction the sensor may present defective pixels. hot pixels have a higher value than the average of their neighbor pixels. a correction can be applied by replacing these defective pixels by the aver- age value of their neighbors. the threshold whic h determines if a pixel is defective can be programmed. this threshold is defined in lsb value above the average value of the neighbor pixels. see register defective pixel control @ 2c4h, internal register mapping on page 16 . see register hot pixel detection threshold @ 2c0h, internal register mapping on page 16 . 5.12 led indicator the green led on the rear panel gives information on the internal state of the camera. on power up, after internal configuration, the led flashes on and has the following behavior (decreasing priority order): internal hardware error or configuration error: fast blinking waiting for external trigger (triggered and itc modes): slow blinking all other situation: continuous sensor_out coef_fpn offset mux c p t pixel_out pattern lut format gain
15 5440a?image?10/05 [preliminary] atmos -2m60/2m30 6. electrical interface 6.1 power supply it is recommended to insert a 1a fuse between the power supply and the camera. the voltage ripple of the power supply shall be below 50 mvp-p at bw = 50 mhz to have full camera performance. note: i = input, o = output, i/o = bi-directional signal, p = power/ground, nc = not connected. 6.2 command and control the camera link interface provides four lvds signals dedicated to camera control (cc1 to cc4). on the atmos, one of them is used to synchronize the camera on external events. note: i = input, o = output, i/o = bi-directional signal, p = power/ground, nc = not connected. the ttl/i/o interface provides two ttl signals dedicated to camera control. note: i = input, o = output, i/o = bi-directional signal, p = power/ground, nc = not connected. see register mode control @ 204h, internal register mapping on page 16 . 6.3 video data data and enable signals are provided on the camera link interface. note: 1. i = input, o = output, i/o = bi-directiona l signal, p = power/ground, nc = not connected. 2. note: dval, as defined in the camera link stan dard, is not used. dval is permanently tied to 1 (high) level. table 6-1. power supply description signal name i/o type description pwr p - dc power input: +12v to + 24v gnd p - electrical and mechanical ground table 6-2. camera link input description signal name i/o type description trig1 i rs644 cc1 - synchronization input table 6-3. ttl/io description signal name i/o type description trigger i 5 v-ttl external trigger input shutter o 3 v-ttl shutter output, maximum output current 1.6 ma table 6-4. camera link output description signal name i/o type description odd-d[11-0] o rs644 odd pixel data, odd-00 = lsb, odd-11 = msb even-d[11-0] o rs644 even pixel da ta, even-00 = lsb, even-11 = msb strobe o rs644 output data clock, data valid on the rising edge lval o rs644 line valid or line enable, active high signal fval o rs644 frame valid or frame enable, active high signal
16 5440a?image?10/05 atmos -2m60/2m30 [preliminary] 6.4 serial communication the camera link interface provides two lvds signal pairs for the communication between the camera and the frame grabber. this is an asynchronous serial communication based on rs-232 protocol. the configuration of the serial line is: full duplex/without handshaking 8-bit data, no parity bit, 1 stop bit 9600 bauds at power up, then programmable up to 115200 bauds (see register communication speed multiplieur @ 001h, internal register mapping on page 16 . 6.4.1 internal register table 6-5. camera link serial co mmunication description signal name i/o type description sertfg o rs644 differential pair for serial communication to the frame grabber sertc i rs644 differential pair for serial communication from the frame grabber table 6-6. internal register mapping start addr (hex) size (dec) end addr (hex) access type processing internal task factory settings description 000 1 ro ro synchronization register for serial communication (value 00) 001 1 rw - 1 communication speed multiplier (9600 - 115,2k): volatile register 1, 2, 3, 4, 6, 8, 12 040 51 ro - hardware identifier 080 8 ro - firmware identifier 0c0 51 rw - user identifier 100 4 rw rw status (ref. camera status management) 104 4 wo - lock/unlock mode: advanced user/user 1: lock advanced user mode (into user mode) unlock key value: unlock user 108 1 ro - privilege level 1: advanced user mode 2: user mode 109 1 wo - current configuration save in eeprom 1: user settings (allowed only for advanced user mode) 2 to 4: user settings
17 5440a?image?10/05 [preliminary] atmos -2m60/2m30 10a 1 rw - 0 current configuration restore from eeprom 1 to 4: user settings 10b 1 wo - fpn coefficient save in dataflash 1 to 4 (1 allowed only for advanced user mode) 10c 1 rw - 1 fpn coefficient restore in dataflash 1 to 4 10d 1 wo - lut coefficient save in dataflash 1 to 4 (1 allowed only for advanced user mode) 10e 1 rw - 1 lut coefficient restore in dataflash 1 to 4 200 2 rw rw 0 calibration control [0] = off-line calibration enabled (0: disabled; 1: enabled) 202 2 rw - 0 processing control: [0] = offset correction enable (0: disabled; 1: enabled) [1] = gain correction enable (0: disabled; 1: enabled) [2] = look-up table correction enable (0: disabled; 1: enabled)[ [4:3] = fpn correction mode (00: disabled; 01: off-line fpn correction enabled; 11: on- line fpn correction enabled) 204 2 rw - 0 mode control: [1:0] = test pattern (00: disabled; 01: fixed test pattern; 10: dynamic test pattern) [3:2] = output format (00:12-bit; 01:10-bit; 10:8-bit) [[7:5] = synchronization mode (000: free- run; 001: external triggered; 010: external triggered without full reset; 011: integration time controlled); others reserved [8] = trigger source (0: camera link; 1: external) [9] = trigger polarity (0:positive edge; 1: negative edge) [10] = shutter polarity output (0: positive edge; 1: negative edge) 206 1 wo software reset: 1 = camera reset table 6-6. internal register mapping (continued) start addr (hex) size (dec) end addr (hex) access type processing internal task factory settings description
18 5440a?image?10/05 atmos -2m60/2m30 [preliminary] note: ro: read only register, wo: write only register, rw: read and write register. 240 2 rw - 0 sensor analog gain: [3:0] = analog gain; value from 0 db (= 0) to 18 db (= 6) by step of 3 db 242 2 rw - 0 digital gain (extended dynamic range): [7:0] = gain; value from 1.000 (= 0) to 32.875 (= 255) in q 8.3 representation 244 2 rw - 0 digital offset (extended dynamic range): [12:0] = offset; value from -4096 to + 4095 in 2's complement 246 2 rw - 1 aperture shutter time: [15:0] = shutter time; value from 0 to 65535 (for 2m60: 0 to 655 ms by step of 10 s) (for 2m30: 0 to 1310 ms by step of 20s) 248 2 rw - 1600 ers: [10:0] value from 0% (= 0,dark) to 100% (= 1600, clear) in q11.4 representation 280 8 287 rw roi area: addr 280, size 2, default 0: roi horizontal start value from 0 to 2080 addr 282, size 2, default 0 roi vertical start value from 0 to 1182 addr 284, size 2, default 1920 roi vertical size value from 32 to 2096 addr 286, size 2, default 1080 roi vertical size value from 32 to 1184 2c0 2 rw 50 hot pixel detection threshold: [10:0] = hot pixel threshold 2c4 1 rw - 0 defective pixels control: [0] = hot pixel detection (0: disabled; 1: enabled 300 1 wo - gamma correction: [5:0] = gamma settings; value from 0.125 (= 1) to 7.875 (= 63) in q6.3 representation 1000 1312 151f rw - 0 fpn coefficien ts (8-bit): format: fpn [0]; fpn[1]; fpn [2];? 2000 8192 3fff rw - linear look-up table (4096 16-bit): format: lut [0]; lut [1]; ? ; lut [4095] value: 0 to 4095 table 6-6. internal register mapping (continued) start addr (hex) size (dec) end addr (hex) access type processing internal task factory settings description
19 5440a?image?10/05 [preliminary] atmos -2m60/2m30 6.4.2 camera settings memory atmos cameras have 5 ba nks to save settings: bank 0 contains the factory settings. this bank cannot be modified by the user bank 1 to 4 are used to store 4 different settings bank 1 might be protected by an advanced user (see register @ 104h). contact atmel for details 7. connector description all connectors are on the rear panel. better result s are obtained by using shielded cables (foil and braid shielded). note: cables for digital signals shall be twisted pairs. 7.1 power supply camera connector type: hirose hr10a-7r-6pb (male) cable connector type: hirose hr10a-7p-6s (female) figure 7-1. power supply pinout power connector : j01 signal pin signal pin pwr 1 gnd 4 nc 2 nc 5 pwr 3 gnd 6 1 2 3 6 5 4 receptacle viewed from camera back
20 5440a?image?10/05 atmos -2m60/2m30 [preliminary] 7.2 camera link connector standard camera link cable shall be used to ensure the full electrical compatibility. camera connector type: mdr-26 (female) ref. 3m 10226-2210ve we recommend to use a camera link standard shielded ca ble as 3m 14x26-szlb-xxx-0lc figure 7-2. camera link pinout 7.3 ttl i/o camera connector type: hirose hr10a-7r-5sb (female) cable connector type: hirose hr10a-7p-5p (male) figure 7-3. ttl/io pinout command and control connector : j02 signal pin signal pin gnd 1 gnd 14 x0- 2 x0+ 15 x1- 3 x1+ 16 x2- 4 x2+ 17 xclk- 5 xclk+ 18 x3- 6 x3+ 19 sertc+ 7 sertc- 20 sertfg- 8 sertfg+ 21 cc1- 9 cc1+ 22 cc2+ 10 cc2- 23 cc3- 11 cc3+ 24 cc4+ 12 cc4- 25 gnd 13 gnd 26 ttl io connector : j03 signal pin signal pin trigger 1 gnd 4 gnd 2 nc 5 shutter 3 1 2 3 5 4 receptacle viewed from camera back
21 5440a?image?10/05 [preliminary] atmos -2m60/2m30 8. mechanical drawing note: (all dimensions are in mm) figure 8-1. front panel view figure 8-2. front panel mechanical drawing note: 1. a and b are mechanical reference plans. 2. sensor alignment ? x, y refers to the optical axis. 3. sensor alignment ?0 xy refers to the reference plans. 44.75 12 3.75 22 38.5 2 x (m4 x 8) 4 x (m3 x 8) 1 - 32 un - 2a (c mount) first pixel of line 1 b a camera link power supply 44 35 sensor (on the 4 sides)
22 5440a?image?10/05 atmos -2m60/2m30 [preliminary] figure 8-3. rear panel figure 8-4. rear panel mechanical drawing 31.30 23 9.90 22.80 44 12-24v ttl io camera link ?
23 5440a?image?10/05 [preliminary] atmos -2m60/2m30 9. ordering code delivery : atmos areascan cameras are delivered with: power supply female connector hr10a-7p-6s ttl i/o male connector hr10a-7p-5p cd-rom with: ? friendly software commcam ? documentation note: optical lens is not provided. table 9-1. ordering code part number description at71-atm2m60m-b0 atmos 2m60 with housing + power supply connector + ttl i/o connector + cd-rom AT71-ATM2M30M-B0 atmos 2m30 with housing + power supply connector + ttl i/o connector + cd-rom
printed on recycled paper. 5440a?image?10/05 ? atmel corporation 2005 . all rights reserved. atmel ? , logo and combinations thereof, and everywhere you are ? , dataflash ? and others are registered trademarks and atmos ? and others , are trademarks of atmel corporation or its subsidiaries. camera link ? is the trademark of automated imaging association. other term s and product names may be trademarks of others. disclaimer: the information in this document is provided in connection with atmel products. no license, express or implied, by estoppel or otherwise, to any intellectual property right is granted by this document or in connection with the sale of atmel products. except as set forth in atmel?s terms and condi- tions of sale located on atmel? s web site, atmel assumes no liability whatsoever and disclaims any express, implied or statutor y warranty relating to its products including, but not limited to , the implied warranty of merchantability, fitness for a particu lar purpose, or non-infringement. in no event shall atmel be liable for any direct, indirect, conseque ntial, punitive, special or i nciden- tal damages (including, without limitation, damages for loss of profits, business interruption, or loss of information) arising out of the use or inability to use this document, even if at mel has been advised of the possibility of such damages. atmel makes no representations or warranties with respect to the accuracy or completeness of the contents of this document and reserves the ri ght to make changes to specifications and product descriptions at any time without notice. atmel does not make any commitment to update the information contained her ein. unless specifically provided otherwise, atmel products are not suitable for, and shall not be used in, automotive applications. atmel?s products are not int ended, authorized, or warranted for use as components in applications intended to support or sustain life. atmel corporation atmel operations 2325 orchard parkway san jose, ca 95131, usa tel: 1(408) 441-0311 fax: 1(408) 487-2600 regional headquarters europe atmel sarl route des arsenaux 41 case postale 80 ch-1705 fribourg switzerland tel: (41) 26-426-5555 fax: (41) 26-426-5500 asia room 1219 chinachem golden plaza 77 mody road tsimshatsui east kowloon hong kong tel: (852) 2721-9778 fax: (852) 2722-1369 japan 9f, tonetsu shinkawa bldg. 1-24-8 shinkawa chuo-ku, tokyo 104-0033 japan tel: (81) 3-3523-3551 fax: (81) 3-3523-7581 memory 2325 orchard parkway san jose, ca 95131, usa tel: 1(408) 441-0311 fax: 1(408) 436-4314 microcontrollers 2325 orchard parkway san jose, ca 95131, usa tel: 1(408) 441-0311 fax: 1(408) 436-4314 la chantrerie bp 70602 44306 nantes cedex 3, france tel: (33) 2-40-18-18-18 fax: (33) 2-40-18-19-60 asic/assp/smart cards zone industrielle 13106 rousset cedex, france tel: (33) 4-42-53-60-00 fax: (33) 4-42-53-60-01 1150 east cheyenne mtn. blvd. colorado springs, co 80906, usa tel: 1(719) 576-3300 fax: 1(719) 540-1759 scottish enterprise technology park maxwell building east kilbride g75 0qr, scotland tel: (44) 1355-803-000 fax: (44) 1355-242-743 rf/automotive theresienstrasse 2 postfach 3535 74025 heilbronn, germany tel: (49) 71-31-67-0 fax: (49) 71-31-67-2340 1150 east cheyenne mtn. blvd. colorado springs, co 80906, usa tel: 1(719) 576-3300 fax: 1(719) 540-1759 biometrics/imagin g/hi-rel mpu/ high speed converters/rf datacom avenue de rochepleine bp 123 38521 saint-egreve cedex, france tel: (33) 4-76-58-30-00 fax: (33) 4-76-58-34-80 literature requests www.atmel.com/literature

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